As wafers for manufacturing semiconductor devices such as semiconductor integrated circuits, silicon wafers are mainly used. In such production of semiconductor devices, crystal defects which exist in wafer surface layers such as COPs (Crystal Originated Particles) can be mentioned as one of factors that degrade the yield. If such crystal defects exist in wafer surface layers, they may be a cause of degradation of electric characteristics of wafers. For example, in transistors of MOS structure, when high voltage is applied to a thermal oxide film formed on a wafer surface such as a gate oxide film, they may cause generation of dielectric breakdown of the oxide film.
As a further factor that worsens the yield of semiconductor device production, microroughness on wafer surfaces can be mentioned. It is known that microroughness that exists on wafer surfaces adversely affect carrier mobility directly under the gate oxide films (see Shinya Yamakawa, Hirai Ueno, Kenji Taniguchi, Chihiro Hamaguchi, Kazuo Miyatsuji, Umbert Ravaioli, J. Appl. Phys., 79, 911, 1995). In semiconductor devices, if degree of integration is increased, carrier mobility must correspondingly be increased. Moreover, with recent use of increasingly higher driving frequency of CPU, write time and read time of memories are required to be made higher. Therefore, it has come to be considered more important to make microroughness small in order to improve carrier mobility.
As a method for reducing crystal defects of silicon wafer surface layers, elimination of the defects by annealing heat treatment and so forth have been performed. A typical example thereof is high temperature hydrogen annealing. This method is a method for eliminating crystal defects by performing annealing heat treatment in a hydrogen atmosphere at a high temperature (see Japanese Patent Laid-open Publication (Kokai) No. 6-349839).
However, although a heat treatment in a hydrogen atmosphere can reduce crystal defects in wafer surface layers, it has a drawback that surfaces of wafers will be etched by the heat treatment. For example, when a heat treatment is performed at 1200° C. for 60 minutes, about 0.5 μm of silicon of wafer surface layers will be etched. For this reason, thickness of the portions of wafer surfaces with few crystal defects (defect-free layer) becomes small.
Furthermore, it is very dangerous to handle hydrogen gas at a high concentration at such a high temperature over a long period of time. Thus, it cannot be practically used without solving the problem of safety.
Therefore, there has also been proposed a method for eliminating crystal defects of wafer surface layers by performing a heat treatment using an inert gas such as argon for the atmosphere. However, although the crystal defects in wafer surface layers can be reduced by this method without etching wafer surface layers, it has a drawback that it worsens microroughness on wafer surfaces compared with that before the heat treatment.
In addition, there is also an abuse that local etching comes to be likely to occur due to the influence of a small amount of oxygen in the atmosphere, and thus haze is generated.
The term “haze” used herein is an index of surface roughness, and means periodical waviness having a period of several to several tens of nanometers on the wafer surfaces. It is surface roughness that can be semi-quantitatively evaluated as a haze level of a whole wafer surface by scanning the whole wafer surface with a particle counter mainly utilizing a laser, and measuring strength of scattered reflection thereof.
Another method for avoiding the danger of hydrogen gas, there has also been contemplated a method utilizing a heat treatment with a hydrogen atmosphere and a heat treatment with an inert gas atmosphere such as argon in combination. This method comprises first performing a heat treatment of wafers in an inert gas atmosphere, and then performing a heat treatment of the wafers in a hydrogen atmosphere (see Japanese Patent Laid-open Publication No. 4-167433).
However, the heat treatment in an atmosphere containing hydrogen at the same temperature as the preceding heat treatment in an inert gas atmosphere will eventually etch wafer surfaces, and thus the defect-free layer thickness will become small.
Further, Japanese Patent Laid-open Publication No. 7-235567 discloses a method which comprises performing a heat treatment in an inert atmosphere, wherein hydrogen is introduced into the atmosphere during the temperature increasing or temperature decreasing period of the heat treatment. However, this method was accomplished with the purpose of preventing generation of slip dislocations in wafers by introducing hydrogen having heat conductivity higher than that of inert gas during the temperature increasing or temperature decreasing, and this method is not for eliminating crystal defects which exist in wafer surface layers or improving microroughness on wafer surfaces.
That is, this method simply comprises continuously introducing 1 liter/minute of hydrogen during the temperature increasing and decreasing, and an optimum composition of the heat treatment atmosphere during the temperature increasing and decreasing is unknown. Therefore, even if this method is used, the etching amount of the wafer surfaces may become large, or microroughness may be worsened. Thus, crystal defect density and surface roughness cannot be improved simultaneously.
As described above, among the conventional heat treatment methods, there are no method for reducing crystal defects of wafer surface layers without etching wafer surface layers and without degrading microroughness of wafers, with a little amount of hydrogen used. Therefore, it is desired to develop an effective method.
Furthermore, in the hydrogen annealing, the heat treatment is usually performed under a hydrogen gas atmosphere by increasing temperature at a temperature increasing rate of 1–10° C./min, maintaining a temperature of from 950° C. to the melting point of silicon for several hours, and then decreasing the temperature at a temperature decreasing rate of 2–5° C./min (for example, Japanese Patent Publication (Kokoku) No. 5-18254 and Japanese Patent Laid-open Publication No. 6-295912). However, this heat treatment method has a drawback that the heat treatment requires a long period of time.
Therefore, it has been proposed a method for heat treatment using an apparatus for rapid heating and rapid cooling (Rapid Thermal Annealer, also abbreviated as “RTA apparatus” hereinafter) in order to shorten the heat treatment time etc. For example, in Japanese Patent Application No. 10-82606, the inventors of the present invention previously proposed a method for heat treatment of silicon wafers under a reducing atmosphere using an RTA apparatus, and proposed a method for heat treatment that can, in particular, reduce the COP density on surfaces of silicon wafers.
This method comprises a heat treatment of silicon wafers within a temperature range of from 1200° C. to the melting point of silicon for 1–60 seconds under a reducing atmosphere. In this method, it is further preferred that 100% hydrogen or a mixed atmosphere of hydrogen and argon is used as the reducing atmosphere, and the heat treatment time is selected to be 1–30 seconds.
Further, it was found that COP density on surfaces of silicon wafers was markedly reduced and one of the electric characteristics, oxide dielectric breakdown voltage (Time Zero Dielectric Breakdown: TDDB), was also markedly improved by this method.
However, this method has a drawback that the aforementioned surface roughness on wafer surfaces after the heat treatment, called haze, may be degraded.
In addition, as mentioned above, it is known that surface roughness on wafer surfaces such as haze closely relates to performance and reliability of devices as a factor which greatly affects the electrical characteristics such as oxide dielectric breakdown voltage and carrier mobility (see Shinya Yamakawa et. al., J. Appl. Phys. 79, 911, 1996), and haze on wafer surfaces is considered a big problem.
Therefore, in Japanese Patent Application No. 10-176693, the inventors of the present invention proposed a method wherein the RTA heat treatment is performed with two or more divided steps as a method for solving that problem. In this method, a heat treatment of a preceding step is performed with the purpose of reduction of COPS, and a heat treatment of a subsequent step is performed in order to improve surface roughness on wafer surfaces such as haze.
Since this method can sufficiently improve haze while reducing COPs, it is a very useful method. However, because it requires performing two or more steps of high temperature heat treatments in an RTA apparatus, it has a drawback of complicated process steps. Such complicated process steps lead to increase of cost due to decrease of throughput. Therefore, it is desired to be further improved.